October 2006 - Global Online EuroAsia Semiconductor Magazine.
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Features
Editors Comment
By David Ridsdale |
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Cover story
Made to measure
The economies of manufacturing dielectric constant has its
challenges, as design rules shrink the choice of Low K Materials
shrinks with it, Liam Cunnane, Adrian Kiermasz Phd,
Rob Wilby of Metryx Ltd & Youssef Travaly of IMEC demonstrate how measuring a film’s dielectric constant can be
influenced by the material on which it is deposited. |
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Fab Management
quick cycle long spin
Minimizing on cycle lengths can have a dramatic effect on
market share when bringing new IC’s to market. J. Blanc and
S. Hury of INCAM Solutions France discuss how queue
jumping may be the clue to achieving shorter cycle times by
conveying rush lots in single wafer carriers. |
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Design For Packaging
Ending with the beginning
Back end technology must reflect ingenuity in the design of its
console. Andy Longford of P&A Europe discusses why chip
design housing must be the chicken that came before the egg
where it proves prudent to consider chip packaging right at the
stages of chip design. |
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Yield Management
Hearing out the problems
Could acoustic microscopy be the answer to perfecting
microelectronic device manufacturing? Tom Adams of
Sonoscan discusses the effects of using acoustic microscopy
to bounce back a sound understanding of what goes on
beneath the chips surface |
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Business News
Head in the sand won’t work
The RoHS directive caused stir enough alone but now there
is no escape for those hoping to avoid hefty legislation
enforcement as two new laws loom overhead for the electronics
industry Michael Kirschner, President, Design Chain discusses
the implications. |
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NewsDesk
Scaling down the chip geometries
Upgrading the outdated in Russia
Departments
Recruitment
New Product Promotion
Web Listing
Source of Supply
Regional Round up
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